CERN Accelerating science

Over the years 2019-2020, the ALICE experimental apparatus will undergo a major upgrade. A key element of the modernization is the construction of a new Inner Tracking System (ITS) consisting of 24,120 monolithic active pixel sensors (MAPSs). The sensors' constrained power budgets limit their data line driving capability, forcing the readout electronics to be located as close as possible to the detector in a hostile radiation environment. The readout system serves many various functions. It configures, monitors and reads out data from the detector and interfaces with the trigger and power systems. It also preprocesses and packetizes the received data, and streams the packets out to the data acquisition system. Because of the tasks that it performs, it requires powerful and flexible processing units. Also, as new functionalities are usually implemented over time, it is required that the readout system can be upgraded. Modern FPGA devices meet all of the aforementioned requirements. Unfortunately, dedicated radiation-hard by design FPGAs cannot be utilized, as they are either limited in resources or too expensive. Conversely, commercial-grade SRAM-based FPGAs offer a large amount of logic resources and transceivers, and their price is low enough to be used in large quantities. Although they are susceptible to ionizing and non-ionizing radiation, there exist radiation mitigation methods that can be employed to increase the radiation hardness. Mitigation methods that increase the radiation hardness of non-radiation-hardened SRAM-based FPGAs are the subject of this dissertation. The author verifies the hypothesis that it is possible to design and deploy the readout system employing commercial, non-radiation-hardened SRAM-based FPGAs for the upgraded ALICE Inner Tracking System. The design functional error rate estimation methodology is proposed, which is followed by the explanation of concepts of various radiation mitigation methods based on: spatial redundancy, refreshing of configuration memory of SRAM-based FPGAs, and triplication of inputs and outputs. Basic building blocks of an SRAM-based FPGA design (combinational and sequential circuits, Block RAM, Finite State Machines) were implemented with various mitigation methods employed, and experimentally evaluated via fault injection and irradiation tests. Finally, implementation guidelines based on the obtained experimental results were formulated for the application in the FPGA-based Readout of the upgraded ALICE Inner Tracking System. In the dissertation the author also includes the description of the prototype readout electronics that were utilized as the main platform for radiation testing and various development activities while designing the ITS Readout System.